mspm0_uart.hpp

#pragma once
 
#include <ti/driverlib/dl_dma.h>
#include <ti/driverlib/dl_uart_main.h>
 
#include <array>
#include <atomic>
#include <cstddef>
#include <cstdint>
 
#include "libxr_type.hpp"
#include "serialized_service.hpp"
#include "ti_msp_dl_config.h"
#include "uart.hpp"
 
namespace LibXR
{
 
class MSPM0UART;
 
class MSPM0UARTReadPort : public ReadPort
{
 public:
  explicit MSPM0UARTReadPort(size_t capacity) : ReadPort(capacity) {}
 
  void SetOwner(MSPM0UART* owner) { owner_ = owner; }
 
 protected:
  void OnReadQueueSpaceAvailable(bool in_isr) override;
 
 private:
  MSPM0UART* owner_ = nullptr;  
};
 
class MSPM0UART : public UART
{
  friend class MSPM0UARTReadPort;
 
 public:
  enum class RxMode : uint8_t
  {
    MAIN_BYTE_IRQ,  
    EXTEND_DMA,     
  };
 
  struct Resources
  {
    UART_Regs* instance;
    IRQn_Type irqn;
    uint32_t clock_freq;
    uint8_t index;
    RxMode rx_mode;
    bool rx_half_interrupt;
    uint8_t dma_tx_channel;
    uint8_t dma_tx_trigger;
    uint8_t dma_rx_channel;
    uint8_t dma_rx_trigger;
  };
 
  static constexpr uint8_t INVALID_DMA_CHANNEL = 0xFFU;
 
  MSPM0UART(Resources res, RawData tx_dma_storage, RawData rx_dma_storage,
            uint32_t tx_queue_size = 5U, uint32_t rx_queue_capacity = 128U,
            UART::Configuration config = {115200, UART::Parity::NO_PARITY, 8U, 1U});
 
  ErrorCode SetConfig(UART::Configuration config, bool in_isr = false) override;
 
  static void WriteFun(WritePort& port, bool in_isr);
  static void OnInterrupt(uint8_t index);
 
  static void OnDmaInterrupt();
 
  static UART::Configuration BuildConfigFromSysCfg(UART_Regs* instance,
                                                   uint32_t baudrate);
 
  [[nodiscard]] RxMode GetRxMode() const { return res_.rx_mode; }
  [[nodiscard]] bool RxHalfInterruptEnabled() const { return res_.rx_half_interrupt; }
 
  MSPM0UARTReadPort _read_port;  // NOLINT(readability-identifier-naming)
  WritePort _write_port;         // NOLINT(readability-identifier-naming)
 
  static constexpr uint8_t ResolveIndex(IRQn_Type irqn)
  {
    switch (irqn)
    {
#if defined(UART0_BASE)
      case UART0_INT_IRQn:
        return 0U;
#endif
#if defined(UART1_BASE)
      case UART1_INT_IRQn:
        return 1U;
#endif
#if defined(UART2_BASE)
      case UART2_INT_IRQn:
        return 2U;
#endif
#if defined(UART3_BASE)
      case UART3_INT_IRQn:
        return 3U;
#endif
#if defined(UART4_BASE)
      case UART4_INT_IRQn:
        return 4U;
#endif
#if defined(UART5_BASE)
      case UART5_INT_IRQn:
        return 5U;
#endif
#if defined(UART6_BASE)
      case UART6_INT_IRQn:
        return 6U;
#endif
#if defined(UART7_BASE)
      case UART7_INT_IRQn:
        return 7U;
#endif
      default:
        return INVALID_DMA_CHANNEL;
    }
  }
 
 private:
  enum class ConfigState : uint32_t
  {
    EMPTY = 0U,
    RESERVED = 1U,
    PUBLISHED = 2U,
  };
 
  static constexpr uint8_t MAX_UART_INSTANCES = 8U;
  static_assert(DMA_SYS_N_DMA_CHANNEL <= 16U);
  static constexpr uint8_t MAX_DMA_CHANNELS = static_cast<uint8_t>(DMA_SYS_N_DMA_CHANNEL);
  static constexpr uint32_t MSPM0_UART_DMA_MAX_TRANSFER_SIZE = 0xFFFFU;
 
  static constexpr uint32_t EVENT_WRITE = 1U << 0U;
  static constexpr uint32_t EVENT_DMA_DONE_TX = 1U << 1U;
  static constexpr uint32_t EVENT_EOT_DONE = 1U << 2U;
  static constexpr uint32_t EVENT_CONFIG = 1U << 3U;
  static constexpr uint32_t EVENT_RX_WORK = 1U << 4U;
 
  static constexpr uint32_t RX_ERROR_INTERRUPT_MASK =
      DL_UART_INTERRUPT_OVERRUN_ERROR | DL_UART_INTERRUPT_BREAK_ERROR |
      DL_UART_INTERRUPT_PARITY_ERROR | DL_UART_INTERRUPT_FRAMING_ERROR |
      DL_UART_INTERRUPT_NOISE_ERROR;
 
  static constexpr uint32_t RX_INTERRUPT_MASK = DL_UART_INTERRUPT_RX;
  static constexpr uint32_t RX_TIMEOUT_INTERRUPT_MASK =
      DL_UART_INTERRUPT_RX_TIMEOUT_ERROR;
  static constexpr uint32_t RX_GAP_INTERRUPT_MASK = DL_UART_INTERRUPT_LINC0_MATCH;
  static constexpr uint32_t TX_DONE_INTERRUPT_MASK = DL_UART_INTERRUPT_DMA_DONE_TX;
  static constexpr uint32_t EOT_INTERRUPT_MASK = DL_UART_INTERRUPT_EOT_DONE;
 
  void HandleService(uint32_t events, bool in_isr);
  void FillTx(bool in_isr);
  void HandleTxDone(bool in_isr);
  void HandleRxWork(bool in_isr);
  void HandleMainRx(bool in_isr);
  void HandleExtendRx(bool in_isr);
  void NotifyReadSpace(bool in_isr);
  void HandleUartInterrupt();
  void HandleRxDmaInterrupt();
 
  [[nodiscard]] ErrorCode ValidateConfig(UART::Configuration config) const;
  void ApplyConfig(UART::Configuration config);
  void TryApplyPublishedConfig(bool in_isr);
  void ConfigureTxDma();
  void ConfigureRxDma();
  void StartDataPath();
  void StopDataPath();
  void DiscardRxFifo();
  void StartTxDma(uint8_t half, size_t size);
 
  [[nodiscard]] uint8_t* TxHalf(uint8_t half) const
  {
    return static_cast<uint8_t*>(tx_dma_storage_.addr_) +
           static_cast<size_t>(half) * tx_half_size_;
  }
 
  [[nodiscard]] size_t RxCapacity() const { return rx_dma_storage_.size_; }
 
  static uint32_t DmaCompleteMask(uint8_t channel)
  {
    return channel < MAX_DMA_CHANNELS ? (1UL << channel) : 0U;
  }
 
  static uint32_t DmaEarlyMask(uint8_t channel)
  {
    return channel < 8U ? (1UL << (16U + channel)) : 0U;
  }
 
  static uint32_t DmaRawMask(uint8_t channel, bool half)
  {
    return DmaCompleteMask(channel) | (half ? DmaEarlyMask(channel) : 0U);
  }
 
  Resources res_{};
  RawData tx_dma_storage_{};
  RawData rx_dma_storage_{};
  size_t tx_half_size_ = 0U;
  std::array<size_t, 2U> tx_half_size_used_{};
  int8_t active_half_ = -1;
  bool tx_draining_ = false;
  size_t rx_dma_cursor_ = 0U;
 
  SerializedService service_{};
  std::atomic<ConfigState> config_state_{ConfigState::EMPTY};
  UART::Configuration pending_config_{};
 
  static MSPM0UART* instance_map_[MAX_UART_INSTANCES];
};
 
namespace Detail
{
 
// 以下构造辅助函数检查 BSP 声明的 DMA 归属，不增加运行时资源状态。
// These helpers check BSP-declared DMA ownership without adding runtime state.
template <IRQn_Type UartIrqn, uint32_t TxDmaChannel, IRQn_Type TxDmaOwnerIrqn,
          bool TxBinding>
MSPM0UART::Resources MakeMSPM0MainUartResources(UART_Regs* instance, uint32_t clock_freq,
                                                uint8_t tx_dma_trigger)
{
  static_assert(TxBinding);
  static_assert(TxDmaOwnerIrqn == UartIrqn);
  static_assert(TxDmaChannel < DMA_SYS_N_DMA_CHANNEL);
  return {instance,
          UartIrqn,
          clock_freq,
          MSPM0UART::ResolveIndex(UartIrqn),
          MSPM0UART::RxMode::MAIN_BYTE_IRQ,
          false,
          static_cast<uint8_t>(TxDmaChannel),
          tx_dma_trigger,
          MSPM0UART::INVALID_DMA_CHANNEL,
          0U};
}
 
template <IRQn_Type UartIrqn, uint32_t TxDmaChannel, IRQn_Type TxDmaOwnerIrqn,
          bool TxBinding, uint32_t RxDmaChannel, IRQn_Type RxDmaOwnerIrqn, bool RxBinding,
          bool ExtendCapable, bool FullRxChannel, bool HalfRxInterrupt>
MSPM0UART::Resources MakeMSPM0ExtendUartResources(UART_Regs* instance,
                                                  uint32_t clock_freq,
                                                  uint8_t tx_dma_trigger,
                                                  uint8_t rx_dma_trigger)
{
  static_assert(TxBinding);
  static_assert(RxBinding);
  static_assert(TxDmaOwnerIrqn == UartIrqn);
  static_assert(RxDmaOwnerIrqn == UartIrqn);
  static_assert(TxDmaChannel < DMA_SYS_N_DMA_CHANNEL);
  static_assert(RxDmaChannel < DMA_SYS_N_DMA_FULL_CHANNEL);
  static_assert(TxDmaChannel != RxDmaChannel);
  static_assert(ExtendCapable);
  static_assert(FullRxChannel);
  static_assert(!HalfRxInterrupt || RxDmaChannel < 8U);
  return {instance,
          UartIrqn,
          clock_freq,
          MSPM0UART::ResolveIndex(UartIrqn),
          MSPM0UART::RxMode::EXTEND_DMA,
          HalfRxInterrupt,
          static_cast<uint8_t>(TxDmaChannel),
          tx_dma_trigger,
          static_cast<uint8_t>(RxDmaChannel),
          rx_dma_trigger};
}
 
}  // namespace Detail
 
#define LIBXR_MSPM0_UART_CAT_IMPL(left, right) left##right
#define LIBXR_MSPM0_UART_CAT(left, right) LIBXR_MSPM0_UART_CAT_IMPL(left, right)
#define LIBXR_MSPM0_UART_PROPERTY(name, suffix) LIBXR_MSPM0_UART_CAT(name, suffix)
#define LIBXR_MSPM0_UART_DMA_CHANNEL(name) LIBXR_MSPM0_UART_CAT(name, _CHAN_ID)
#define LIBXR_MSPM0_UART_DMA_PROPERTY(name, suffix) LIBXR_MSPM0_UART_CAT(name, suffix)
#define LIBXR_MSPM0_UART_DMA_TRIGGER_IMPL(instance, direction) \
  DMA_##instance##_##direction##_TRIG
#define LIBXR_MSPM0_UART_DMA_TRIGGER(instance, direction) \
  LIBXR_MSPM0_UART_DMA_TRIGGER_IMPL(instance, direction)
 
#define MSPM0_UART_MAIN_INIT(name, tx_dma, tx_storage_addr, tx_storage_size,             \
                             tx_queue_size, rx_queue_capacity)                           \
  ::LibXR::Detail::MakeMSPM0MainUartResources<                                           \
      name##_INST_INT_IRQN, static_cast<uint32_t>(LIBXR_MSPM0_UART_DMA_CHANNEL(tx_dma)), \
      LIBXR_MSPM0_UART_DMA_PROPERTY(tx_dma, _LIBXR_UART_IRQN),                           \
      static_cast<bool>(LIBXR_MSPM0_UART_DMA_PROPERTY(tx_dma, _LIBXR_UART_TX))>(         \
      name##_INST, name##_INST_FREQUENCY,                                                \
      static_cast<uint8_t>(LIBXR_MSPM0_UART_DMA_TRIGGER(name##_INST, TX))),              \
      ::LibXR::RawData{static_cast<void*>(tx_storage_addr), (tx_storage_size)},          \
      ::LibXR::RawData{}, (tx_queue_size), (rx_queue_capacity),                          \
      ::LibXR::MSPM0UART::BuildConfigFromSysCfg(name##_INST,                             \
                                                static_cast<uint32_t>(name##_BAUD_RATE))
 
#define MSPM0_UART_EXTEND_INIT(name, tx_dma, rx_dma, tx_storage_addr, tx_storage_size,   \
                               tx_queue_size, rx_dma_storage_addr, rx_dma_storage_size,  \
                               rx_queue_capacity)                                        \
  ::LibXR::Detail::MakeMSPM0ExtendUartResources<                                         \
      name##_INST_INT_IRQN, static_cast<uint32_t>(LIBXR_MSPM0_UART_DMA_CHANNEL(tx_dma)), \
      LIBXR_MSPM0_UART_DMA_PROPERTY(tx_dma, _LIBXR_UART_IRQN),                           \
      static_cast<bool>(LIBXR_MSPM0_UART_DMA_PROPERTY(tx_dma, _LIBXR_UART_TX)),          \
      static_cast<uint32_t>(LIBXR_MSPM0_UART_DMA_CHANNEL(rx_dma)),                       \
      LIBXR_MSPM0_UART_DMA_PROPERTY(rx_dma, _LIBXR_UART_IRQN),                           \
      static_cast<bool>(LIBXR_MSPM0_UART_DMA_PROPERTY(rx_dma, _LIBXR_UART_RX)),          \
      static_cast<bool>(LIBXR_MSPM0_UART_PROPERTY(name, _LIBXR_EXTEND_CAPABLE)),         \
      static_cast<bool>(LIBXR_MSPM0_UART_DMA_PROPERTY(rx_dma, _LIBXR_FULL_CHANNEL)),     \
      static_cast<bool>(LIBXR_MSPM0_UART_DMA_PROPERTY(rx_dma, _LIBXR_HALF_INTERRUPT))>(  \
      name##_INST, name##_INST_FREQUENCY,                                                \
      static_cast<uint8_t>(LIBXR_MSPM0_UART_DMA_TRIGGER(name##_INST, TX)),               \
      static_cast<uint8_t>(LIBXR_MSPM0_UART_DMA_TRIGGER(name##_INST, RX))),              \
      ::LibXR::RawData{static_cast<void*>(tx_storage_addr), (tx_storage_size)},          \
      ::LibXR::RawData{static_cast<void*>(rx_dma_storage_addr), (rx_dma_storage_size)},  \
      (tx_queue_size), (rx_queue_capacity),                                              \
      ::LibXR::MSPM0UART::BuildConfigFromSysCfg(name##_INST,                             \
                                                static_cast<uint32_t>(name##_BAUD_RATE))
 
}  // namespace LibXR