hpm_i2c.hpp

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#pragma once
 
#include <atomic>
 
#include "hpm_clock_drv.h"
#include "hpm_soc.h"
#include "i2c.hpp"
#include "libxr_rw.hpp"
 
#if defined(HPMSOC_HAS_HPMSDK_I2C) && __has_include("hpm_i2c_drv.h")
#include "hpm_i2c_drv.h"
#define LIBXR_HPM_I2C_SUPPORTED 1
using LibXRHpmI2cType = I2C_Type;
#else
#define LIBXR_HPM_I2C_SUPPORTED 0
using LibXRHpmI2cType = void;
#endif
 
#include "hpm_dma.hpp"
 
extern "C" void libxr_hpm_i2c_process_interrupt(LibXRHpmI2cType* ptr);
 
namespace LibXR
{
 
class HPMI2C final : public I2C
{
 public:
  enum class AddressMode : uint8_t
  {
    ADDR_7BIT,  
    ADDR_10BIT  
  };
 
  enum class SequenceFrame : uint8_t
  {
    FIRST,  
    NEXT,   
    LAST    
  };
 
  enum class TransferFlag : uint16_t
  {
    NONE = 0,
#if LIBXR_HPM_I2C_SUPPORTED
    READ = I2C_RD,
    ADDR_10BIT = I2C_ADDR_10BIT,
    NO_START = I2C_NO_START,
    NO_ADDRESS = I2C_NO_ADDRESS,
    NO_READ_ACK = I2C_NO_READ_ACK,
    NO_STOP = I2C_NO_STOP,
    WRITE_CHECK_ACK = I2C_WRITE_CHECK_ACK
#else
    READ = 0x0001U,
    ADDR_10BIT = 0x0002U,
    NO_START = 0x0004U,
    NO_ADDRESS = 0x0008U,
    NO_READ_ACK = 0x0010U,
    NO_STOP = 0x0020U,
    WRITE_CHECK_ACK = 0x0040U
#endif
  };
 
  enum class AsyncTransferKind : uint8_t
  {
    NONE,
    READ,
    WRITE,
    MEM_READ
  };
 
  struct WaitPolicy
  {
    uint64_t addr_hit_timeout_us;
    uint64_t stop_timeout_us;
    uint64_t bus_idle_timeout_us;
    uint64_t transfer_timeout_us;
  };
 
  static constexpr WaitPolicy DefaultWaitPolicy()
  {
    return {500ULL, 1000ULL, 1000ULL, 500000ULL};
  }
 
  HPMI2C(LibXRHpmI2cType* i2c, clock_name_t clock, I2C::Configuration config);
 
  ErrorCode SetAddressMode(AddressMode mode);
 
  ErrorCode SetWaitPolicy(WaitPolicy policy);
 
  WaitPolicy GetWaitPolicy() const { return wait_policy_; }
 
  AddressMode GetAddressMode() const { return address_mode_; }
 
  ErrorCode SequenceWrite(uint16_t slave_addr, ConstRawData write_data,
                          SequenceFrame frame, bool check_ack, WriteOperation& op,
                          bool in_isr = false);
 
  ErrorCode SequenceRead(uint16_t slave_addr, RawData read_data, SequenceFrame frame,
                         ReadOperation& op, bool in_isr = false);
 
  ErrorCode TransferWithFlags(uint16_t slave_addr, RawData data, uint16_t flags,
                              ReadOperation& op, bool in_isr = false);
 
  ErrorCode TransferWithFlags(uint16_t slave_addr, ConstRawData data, uint16_t flags,
                              WriteOperation& op, bool in_isr = false);
 
  ErrorCode Read(uint16_t slave_addr, RawData read_data, ReadOperation& op,
                 bool in_isr = false) override;
 
  ErrorCode Write(uint16_t slave_addr, ConstRawData write_data, WriteOperation& op,
                  bool in_isr = false) override;
 
  ErrorCode MemRead(uint16_t slave_addr, uint16_t mem_addr, RawData read_data,
                    ReadOperation& op,
                    MemAddrLength mem_addr_size = MemAddrLength::BYTE_8,
                    bool in_isr = false) override;
 
  ErrorCode MemWrite(uint16_t slave_addr, uint16_t mem_addr, ConstRawData write_data,
                     WriteOperation& op,
                     MemAddrLength mem_addr_size = MemAddrLength::BYTE_8,
                     bool in_isr = false) override;
 
  ErrorCode SetConfig(Configuration config) override;
 
  uint32_t GetClockFreq() const { return source_clock_hz_; }
 
  void CompleteAsyncTransfer(bool in_isr, ErrorCode ans);
 
 private:
  friend void ::libxr_hpm_i2c_process_interrupt(LibXRHpmI2cType* ptr);
 
  struct AsyncTransferContext
  {
    AsyncTransferKind kind = AsyncTransferKind::NONE;
    uint16_t slave_addr = 0U;
    MemAddrLength mem_addr_size = MemAddrLength::BYTE_8;
    uint16_t mem_addr = 0U;
    uint32_t mem_addr_size_in_byte = 0U;
    uint8_t mem_addr_bytes[2] = {};
    uint16_t flags = 0U;
    RawData read_data = {nullptr, 0};
    ConstRawData write_data = {nullptr, 0};
    ReadOperation read_op = {};
    WriteOperation write_op = {};
    std::atomic<hpm_stat_t> final_status{
        status_success};  
    std::atomic<bool> should_recover{
        false};  
    std::atomic<bool> dma_done{
        false};  
    std::atomic<bool> cmpl_done{false};  
  };
 
  struct AsyncCompletionStateMachine
  {
    static void Reset(AsyncTransferContext& ctx);
    static void MarkDmaDone(AsyncTransferContext& ctx);
    static void MarkI2cDone(AsyncTransferContext& ctx, hpm_stat_t status, bool recover);
    static void MarkFailure(AsyncTransferContext& ctx, hpm_stat_t status, bool recover);
    static void SetFinalStatus(AsyncTransferContext& ctx, hpm_stat_t status);
    static bool DmaDone(const AsyncTransferContext& ctx);
    static bool Ready(const AsyncTransferContext& ctx);
    static hpm_stat_t FinalStatus(const AsyncTransferContext& ctx);
    static bool ShouldRecover(const AsyncTransferContext& ctx);
  };
 
  static constexpr uint16_t kMax7BitAddress = 0x7FU;
 
  static constexpr uint16_t kMax10BitAddress = 0x3FFU;
 
  static ErrorCode ConvertStatus(hpm_stat_t status);
 
#if LIBXR_HPM_I2C_SUPPORTED
  static ErrorCode ResolveMode(uint32_t clock_speed, i2c_mode_t& mode);
#endif
 
  static ErrorCode ConvertDmaStatus(hpm_stat_t status);
 
#if LIBXR_HPM_I2C_SUPPORTED
  static i2c_seq_transfer_opt_t ConvertSequenceFrame(SequenceFrame frame);
#endif
 
  uint16_t BuildTransferFlags(uint16_t flags) const;
 
  static uint16_t GetMaxSlaveAddress(AddressMode mode);
 
  ErrorCode ValidateSlaveAddress(uint16_t slave_addr) const;
 
  ErrorCode ValidateTransferArgs(uint16_t slave_addr, RawData data,
                                 bool allow_zero_size) const;
 
  ErrorCode ValidateTransferArgs(uint16_t slave_addr, ConstRawData data,
                                 bool allow_zero_size) const;
 
  ErrorCode ValidateMemWriteArgs(uint16_t slave_addr, ConstRawData write_data,
                                 MemAddrLength mem_addr_size, uint32_t& addr_size) const;
 
  static ErrorCode ResolveMemAddressSize(MemAddrLength len, uint32_t& addr_size);
 
  static void FillMemAddress(uint16_t mem_addr, MemAddrLength len, uint8_t out[2]);
 
  ErrorCode DoSequenceWrite(uint16_t slave_addr, ConstRawData write_data,
                            SequenceFrame frame, bool check_ack);
 
  ErrorCode DoSequenceRead(uint16_t slave_addr, RawData read_data, SequenceFrame frame);
 
  ErrorCode DoTransferWithFlags(uint16_t slave_addr, RawData data, uint16_t flags);
 
  hpm_stat_t DoManualTransferWithFlags(uint16_t slave_addr, RawData data, uint16_t flags);
 
  ErrorCode PrepareAsyncTransfer(uint16_t slave_addr, uint16_t flags, uint32_t size,
                                 bool clear_fifo = true, bool require_bus_idle = true);
 
  static uint32_t ToSystemAddress(const void* addr);
 
  ErrorCode StartAsyncReadDma(void* dst, uint32_t size);
 
  ErrorCode StartAsyncWriteDma(const void* src, uint32_t size);
 
  void StopAsyncDma();
 
  void StopAndReleaseAsyncBus();
 
  void ResetAsyncState();
 
  void ClearAsyncContext();
 
  void AbortAsyncStart(bool stop_dma, bool disable_irq, bool recover_controller);
 
  template <typename Op>
  void StartAsyncBlockWaitIfNeeded(Op& op)
  {
    if (op.type == Op::OperationType::BLOCK)
    {
      block_wait_.Start(*op.data.sem_info.sem);
    }
  }
 
  template <typename Op>
  void CancelAsyncBlockWaitIfNeeded(Op& op)
  {
    if (op.type == Op::OperationType::BLOCK)
    {
      block_wait_.Cancel();
    }
  }
 
  template <typename Op>
  void CompleteAsyncOperation(Op& op, bool in_isr, ErrorCode ans)
  {
    if (op.type == Op::OperationType::BLOCK)
    {
      (void)block_wait_.TryPost(in_isr, ans);
    }
    else
    {
      op.UpdateStatus(in_isr, ans);
    }
  }
 
  ErrorCode StartWriteAsync(uint16_t slave_addr, ConstRawData write_data,
                            WriteOperation& op);
 
  ErrorCode StartReadAsync(uint16_t slave_addr, RawData read_data, ReadOperation& op);
 
  ErrorCode StartMemReadAsync(uint16_t slave_addr, uint16_t mem_addr, RawData read_data,
                              ReadOperation& op, MemAddrLength mem_addr_size);
 
  ErrorCode EnsureAsyncDmaReady();
 
  ErrorCode WaitForAsyncBlockResult(uint32_t timeout);
 
  void ReleaseAsyncBus();
 
  ErrorCode EnableAsyncI2cIrq();
 
  void DisableAsyncI2cIrq();
 
  void HandleAsyncInterrupt(bool in_isr);
 
  void MaybeCompleteAsyncTransfer(bool in_isr);
 
  bool TryClaimAsyncCompletion();
 
  static void OnDmaTcCallback(DMA_Type* base, uint32_t channel, void* cb_data_ptr);
 
  static void OnDmaErrorCallback(DMA_Type* base, uint32_t channel, void* cb_data_ptr);
 
  static void OnDmaAbortCallback(DMA_Type* base, uint32_t channel, void* cb_data_ptr);
 
  bool AsyncTransferActive() const
  {
    return async_busy_.load(std::memory_order_acquire) != 0U;
  }
 
  ErrorCode EnsureClockReady();
 
  ErrorCode EnsureControllerReady();
 
  ErrorCode ApplyConfig(const Configuration& config);
 
  static bool ShouldRecover(hpm_stat_t status);
 
  void RecoverController();
 
  void TryRecoverBusLines();
 
  template <typename Op>
  static ErrorCode FinishOperation(Op& op, bool in_isr, ErrorCode ans)
  {
    if (op.type != Op::OperationType::BLOCK)
    {
      op.UpdateStatus(in_isr, ans);
    }
    return ans;
  }
 
  LibXRHpmI2cType* i2c_;          
  clock_name_t clock_;            
  uint32_t source_clock_hz_ = 0;  
  Configuration current_config_{
      100000};  
  WaitPolicy wait_policy_ =
      DefaultWaitPolicy();  
  AddressMode address_mode_ =
      AddressMode::ADDR_7BIT;  
  bool configured_ = false;    
  std::atomic<uint32_t> async_busy_{
      0U};  
  AsyncTransferContext async_ctx_{};  
  AsyncBlockWait block_wait_{};  
  std::atomic<uint32_t> async_completion_claim_{
      0U};  
  dma_resource_t async_dma_resource_{nullptr, 0U,
                                     -1};  
  uint8_t async_dma_source_ =
      0U;  
  bool async_dma_ready_ =
      false;  
};
 
}  // namespace LibXR