esp_uart.hpp

#pragma once
 
#include <atomic>
#include <cstddef>
#include <cstdint>
 
#include "double_buffer.hpp"
#include "driver/gpio.h"
#include "esp_def.hpp"
#include "esp_intr_alloc.h"
#include "esp_private/critical_section.h"
#include "flag.hpp"
#include "hal/uart_hal.h"
#include "hal/uart_types.h"
#include "serialized_service.hpp"
#include "soc/periph_defs.h"
#include "soc/soc_caps.h"
#include "uart.hpp"
 
#if SOC_GDMA_SUPPORTED && SOC_UHCI_SUPPORTED
#include "esp_private/gdma.h"
#include "esp_private/gdma_link.h"
#include "hal/uhci_hal.h"
#endif
 
namespace LibXR
{
 
class ESP32UART;
 
class ESP32UARTReadPort : public ReadPort
{
 public:
  explicit ESP32UARTReadPort(size_t size, ESP32UART& owner)
      : ReadPort(size), owner_(owner)
  {
  }
 
 protected:
  void OnReadQueueSpaceAvailable(bool in_isr) override;
 
 private:
  ESP32UART& owner_;  
};
 
class ESP32UART : public UART
{
  friend class ESP32UARTReadPort;
 
 public:
  static constexpr int PIN_NO_CHANGE =
      -1;  
 
  ESP32UART(uart_port_t uart_num, int tx_pin, int rx_pin, int rts_pin = PIN_NO_CHANGE,
            int cts_pin = PIN_NO_CHANGE, size_t rx_buffer_size = 1024,
            size_t tx_buffer_size = 512, uint32_t tx_queue_size = 5,
            UART::Configuration config = {115200, UART::Parity::NO_PARITY, 8, 1},
            bool enable_dma = true);
 
  ErrorCode SetConfig(UART::Configuration config, bool in_isr = false) override;
 
  ErrorCode SetLoopback(bool enable);
 
  static void WriteFun(WritePort& port, bool in_isr);
 
 private:
  static uint8_t* AllocateTxStorage(size_t size);
 
  static ErrorCode ResolveUartPeriph(uart_port_t uart_num, periph_module_t& out);
 
  static bool ResolveWordLength(uint8_t data_bits, uart_word_length_t& out);
 
  static bool ResolveStopBits(uint8_t stop_bits, uart_stop_bits_t& out);
 
  static uart_parity_t ResolveParity(UART::Parity parity);
 
  static void UartIsrEntry(void* arg);
 
#if SOC_GDMA_SUPPORTED && SOC_UHCI_SUPPORTED
  static bool DmaTxEofCallback(gdma_channel_handle_t dma_chan,
                               gdma_event_data_t* event_data, void* user_data);
 
  static bool DmaTxDescrErrCallback(gdma_channel_handle_t dma_chan,
                                    gdma_event_data_t* event_data, void* user_data);
 
  static bool DmaRxDoneCallback(gdma_channel_handle_t dma_chan,
                                gdma_event_data_t* event_data, void* user_data);
 
  static bool DmaRxDescrErrCallback(gdma_channel_handle_t dma_chan,
                                    gdma_event_data_t* event_data, void* user_data);
#endif
 
  ErrorCode InitUartHardware();
 
  ErrorCode ConfigurePins();
 
  ErrorCode InstallUartIsr();
 
  void ConfigureRxInterruptPath();
 
#if SOC_GDMA_SUPPORTED && SOC_UHCI_SUPPORTED
  ErrorCode InitDmaBackend();
 
  bool StartDmaTx();
 
  void HandleDmaRxDone(gdma_event_data_t* event_data, bool in_isr);
 
  void HandleDmaRxError(bool in_isr);
 
  void StopDmaRx(bool in_isr);
  void ResetDmaRxDescriptors(bool in_isr);
  void StartDmaRx(bool in_isr);
 
  void HandleDmaTxError(bool in_isr);
 
#endif
 
  ErrorCode TryStartTx(bool in_isr);
 
  bool LoadActiveTxFromQueue(bool in_isr);
 
  bool LoadPendingTxFromQueue(bool in_isr);
 
  bool PromotePendingTxToActive();
 
  bool StartActiveTransfer(bool in_isr);
 
  bool StartAndReportActive(bool in_isr);
 
  void ClearActiveTx();
 
  void FillTxFifo(bool in_isr);
 
  void PushRxBytes(const uint8_t* data, size_t size, bool in_isr);
 
  void DrainRxFifo(bool in_isr);
 
  void HandleUartInterrupt();
 
  void EnableUartInterrupt(uint32_t mask);
  void DisableUartInterrupt(uint32_t mask);
  void ClearUartInterrupt(uint32_t mask);
  void DisableAndClearUartInterrupt(uint32_t mask);
  uint32_t CaptureUartInterrupt(uint32_t mask);
 
  void OnTxTransferDone(bool in_isr, ErrorCode result);
 
  static constexpr uint32_t EVENT_WRITE = 1U << 0U;
  static constexpr uint32_t EVENT_TX_DONE = 1U << 1U;
  static constexpr uint32_t EVENT_RX_WORK = 1U << 2U;
  static constexpr uint32_t EVENT_CONFIG = 1U << 3U;
  static constexpr uint32_t EVENT_TX_WORK = 1U << 4U;
  static constexpr uint32_t EVENT_TX_ERROR = 1U << 5U;
  static constexpr uint32_t EVENT_RX_ERROR = 1U << 6U;
 
  enum class ConfigState : uint8_t
  {
    EMPTY,
    RESERVED,
    PUBLISHED,
  };
 
  void ServiceEvents(uint32_t events, bool in_isr);
  ErrorCode ApplyConfig(const UART::Configuration& config);
  bool TryApplyPublishedConfig(bool in_isr);
 
  uart_port_t uart_num_;  
  int tx_pin_;            
  int rx_pin_;            
  int rts_pin_;           
  int cts_pin_;           
 
  UART::Configuration config_;  
  uint32_t uart_sclk_hz_ = 0U;  
 
  uint8_t* rx_isr_buffer_ = nullptr;  
  size_t rx_isr_buffer_size_ = 0;     
 
  uint8_t* tx_storage_ = nullptr;  
  DoubleBuffer tx_dma_buffer_{};   
  size_t tx_active_length_ = 0U;   
  bool tx_active_valid_ = false;  
  Flag::Plain tx_busy_;           
 
  bool uart_hw_enabled_ = false;              
  uart_hal_context_t uart_hal_ = {};          
  intr_handle_t uart_intr_handle_ = nullptr;  
  bool uart_isr_installed_ = false;           
  bool dma_requested_ = true;                 
 
  SerializedService service_{};
  UART::Configuration requested_config_{};
  std::atomic<uint8_t> config_state_{static_cast<uint8_t>(ConfigState::EMPTY)};
  DECLARE_CRIT_SECTION_LOCK_IN_STRUCT(irq_lock_)
 
  ESP32UARTReadPort _read_port;  
  WritePort _write_port;         
 
#if SOC_GDMA_SUPPORTED && SOC_UHCI_SUPPORTED
  bool dma_backend_enabled_ = false;  
  uhci_hal_context_t uhci_hal_ = {};  
  gdma_channel_handle_t tx_dma_channel_ = nullptr;  
  gdma_channel_handle_t rx_dma_channel_ = nullptr;  
  uintptr_t tx_dma_head_addr_[2] = {0U, 0U};  
  gdma_link_list_handle_t rx_dma_link_ = nullptr;  
  uint8_t* rx_dma_storage_ = nullptr;              
  size_t rx_dma_chunk_size_ = 0;                   
  uint32_t rx_dma_node_index_ = 0;  
#endif
};
 
}  // namespace LibXR